On Chip Variation (OCV) and Usage in STA Timing Analysis

On Chip Variation(OCV) is a concept for variation occurred in chip fabrication. And OCV will bring timing impact for chip/die in different location in wafer, and thus STA results will not match real timing in silicon.

What those variations contain?

OCV variation mainly contain variations during process:

1. Metal width slight variation from location to location, and thus metal resistance is impacted.
2. Metal spacing variation in different location for same wafer, thus capacitance will be impacted. 
3. Gate length/width variation from transistor to transistor, and cell delay will also be impacted.
4. And so on.

Besides process variation for location to location in same wafer, there also exists variation from semiconductor silicon wafer to wafer.
All those variations will impact our timing results, and may cause chip fail to work.

Those on chip variation are exists and can't be avoid, since we can't make each die/wafer exactly the same even we have try hard to do so.

How to solve OCV impact to timing?

We need to solve those timing issue, since the variations can be removed for our semiconductor process.
The solution is to add some timing margin to cover the timing impact due to those on chip variations.

We use timing derate/derating in STA to add margin for those variations.

Command in PrimeTime/PT is

integer set_timing_derate
   -early | -late
   [-rise] [-fall]
   [-data] [-clock] 
   [-cell_delay] [-net_delay] [-cell_check]
   [-static] [-dynamic]
   [-scalar] [-variation]
   [-aocvm_guardband] [-pocvm_guardband] [-pocvm_coefficient_scale_factor]
   [-increment]
   derate_value
   [object_list]

With following command:

set_timing_derate -late -data [expr 1+$X%]
set_timing_derate -late -clock [expr 1+$Y%]
set_timing_derate -early -clock  [expr 1-$Z%]

We can get following timing:

 

With those settings, we will add margin for setup timing check. And the margin number can be calculated by:

LaunchClockPathDelay * Y% + DataPathDelay * X% + CaptureClockPathDelay * Z%

This is the simplest OCV derate settings with a scale number for all cells, pathes, which may be too pessimistic.

We have also introduced AOCV/POCV in advanced nodes.
I will explain those concepts in following posts.