So today, "65 nm" or "45 nm" doesn't exactly refer to the line width, and certainly doesn't indicate how closely you can pack transistors together, although it does provide some indication of these things. Still, it is probably most accurate to say that the number is simply the name of the process, rather than the measure of any particular feature.
From
http://www.edn.com/article/CA6493083.htmlSometimes a perfectly straightforward question has a perfectly messy answer. This is one of those times.
Originally, IC processes were named for the narrowest line that could be resolved by the printing equipment and the photoresist, and then successfully transformed into a feature on the surface of the wafer. In practical terms, this smallest feature was almost always the line that defined the gate electrode on the MOS transistor. So the name of a process became identified with the width of the gate electrode.
Just to make matters more complex, designers referred to this as the "gate length." (If you look at a transistor the way the current does, from one end through to the other, the width of the gate electrode determines the path length the current must traverse getting through the channel region.) Unfortunately for clarity, the gate length is also an approximate measure of transistor speed and of how densely you can pack transistors together in a hand-crafted layout.
Marketing departments seized upon the term as a measure of goodness, and quickly turned what had been a measure of a physical dimension into a measure of marketing bravado. The result was that by about 350 nm (actually called 0.35 micron in those days), the "350 nm" had become simply the name of the process rather than a measure of any physical dimension. The process might only be able to resolve a 380-nm line width, but through various other tricks, process engineers could get the transistors to behave as if their channel length were 350 nm. So it goes.
Today, the number has recovered some accuracy as a physical measure. A 65-nm process usually does have features—again, usually gate line widths—that are approximately 65 nm. There are exceptions. For instance, a company might design a process that will eventually be able to produce 65-nm lines, but for economic reasons they will leave out one or two critical pieces of equipment that would be necessary for the finest possible lines. They will usually announce this as a "65-nm" process, even though today it can't do 65-nm features.
The fascinating part today is that it is physically impossible for the printers, which work with 193-nm-wavelength light, to accurately transfer a 65-nm line from the mask to the wafer's surface. So designers use incredibly sophisticated tricks to make patterns on the mask that, when blurred and distorted by diffraction in the printing process, will end up being sort-of credible 65-nm-wide lines. These tricks include attaching "decorations" all over the line on the mask—bulges in the center, little whiskers at the corners, things that make a rectangle look more like an image in an ink-blot test. This in turn means that even if you can make one perfectly acceptable 65-nm-wide line, you may not be able to make another one right next to it. You may have to leave room for decorations in between.
So today, "65 nm" or "45 nm" doesn't exactly refer to the line width, and certainly doesn't indicate how closely you can pack transistors together, although it does provide some indication of these things. Still, it is probably most accurate to say that the number is simply the name of the process, rather than the measure of any particular feature.
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